Seven high-speed circuit layout and wiring shall know
Seven high-speed circuit layout and wiring shall know
High-speed circuit design, the engineer need to know what knowledge skills? The following seven technical, with specific details - solutions for you.
01
Power supply layout and wiringThe current of the digital circuit needs a lot of time is discontinuous, so for some high-speed device can produce surge current.If the power line is very long, is due to the existence of the surge current, in turn, can lead to high frequency noise, and the high frequency noise will introduce to other signals. And will inevitably exist in high speed circuit parasitic inductance and parasitic resistance and parasitic capacitance, so the high frequency noise will eventually coupled to other circuits, and as a result of the existence of parasitic inductance can also lead to walk line can withstand the waves surge current ability to drop, leading to a portion of the pressure drop, disability is likely to make the circuit.
So in front of the digital device and the bypass capacitor is particularly important. The greater the capacitance, its on the transmit power is limited by transmission rate, so usually in combination with a large capacitance and a small capacitance, to meet the full frequency range.
Avoid hot spots: signal via creates voids in the power supply and ground floor, so unreasonable place via is likely to make the power or ground plane some areas increase of current density. The current density increase place we call it a hot spot.
Concept of electrical / 2 is singing. 11 u LanTun md is increasing.the n 1 NR of your points.So, when we were in setting up a hole to avoid this kind of circumstance happening, lest plane split, eventually led to the EMC problem.
Usually hot way is the best way to avoid the placement of mesh type hole, such a uniform current density, plane not isolation at the same time, the return path is not too long, also won't produce the problem of EMC.
02
Linear way of bendingIn the high speed signal lines, signal lines should try to avoid bending. If have to bend line, don't walk acute or right Angle line, but should go with an obtuse Angle line.
In the high speed signal lines, we often walk through the serpentine to realize isometric, same serpentine is actually a kind of linear bending. Light, line spacing, and bending mode should make reasonable choice, spacing shall meet the rules of 4 W / 1.5 W.
03
Signal proximityIf the distance is too close, between high speed signal lines are easy to produce crosstalk. Sometimes, because the reason such as the layout, the size of the plate and frame, leading to the distance between us in the high speed signal lines more than our minimum distance, that we can only near the bottleneck in its place to try to increase the distance between the high speed signal lines.If space is enough to allow, try to increase the distance between the two high speed signal lines.
04
Walk the line stubsLong stub line is equivalent to an antenna, the EMC problems of improper handling may be severe.A stub line can cause reflection at the same time, reduce the signal integrity. Usually on the high speed signal lines above add or pulldown resistor, will be the easiest way to create a stub line, and the general processing lines to a stub line will go can go chrysanthemum.According to experience, if a stub line length is more than 1/10 of a wavelength can as an antenna, this will be a problem.
05
Impedance discontinuityWalk line impedance value generally depends on the line width and the line and the distance between the reference plane. The smaller the brighter the go line, the impedance. And in some interface terminal device of bonding pad, the same principles apply.When an interface terminal bonding pad and a high-speed line connection, if the solder particularly big, but very thin in the high speed signal lines, large welding plate is small impedance, and let's go line must be big impedance, in this case will appear impedance discontinuity, impedance discontinuity can produce signal reflection.So generally in order to solve this problem, is at the interface terminal or device under the big welding plate placed a ban cloth copper of the welding plate is placed in another layer and a reference plane, which increase the impedance, the impedance continuously.
A hole is another source of impedance discontinuity. In order to minimize the effect, don't need a layer and via the connection, including copper sheet should be removed.
This operation can actually at the time of design by CAD tools to eliminate or connect PCB processing factory to eliminate unwanted copper sheet, ensure the continuity of impedance.
06
The differential signalHigh-speed differential signal line we must ensure that the width and spacing to achieve specific differential impedance values. So at the time of cloth difference signal lines keep symmetry.
Internal ban layout via the differential line or components, if internal placed via the differential line or device produces the EMC problems at the same time can also lead to impedance discontinuity.
Sometimes, some high - speed differential signal lines require serial coupling capacitors. The coupling capacitor also needs to be arranged symmetrically. At the same time, the package of the coupling capacitor should not be too large. It is recommended to use 0402,0603 and it is also acceptable.
Usually, via will produce a great impedance discontinuity, so for high speed difference signal lines to try to reduce the hole, if you want to use via the symmetrical layout.
07
isometric
In some high speed signal interface, usually need to be considered such as bus between the signal arrival time, and time delay error. For example, in a set of high-speed parallel bus signal arrival time, so the data must be guaranteed within a certain time delay error, to ensure that its never establish time and maintain the consistency of the time. In order to meet this demand, we have to consider the length.And high speed difference signal to two signal lines must ensure strict delay, or is likely to communication failure. So in order to meet this requirement, can be done by serpentine length, and meet the requirements of delay.
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