Core And Semiconductor Onchip Passive Electromagnetic Field Simulation Kit Successfully Passed Samsung 8LPP Process Certification
On May 14, 2021, the domestic EDA industry leader, Core & Semiconductor Technology (Shanghai) Co., Ltd. announced that its on-chip passive electromagnetic field (EM) simulation kit has successfully passed the Samsung fab's 8nm low power consumption (8LPP)
Process technical certification.The kit includes a fast three-dimensional electromagnetic field simulator IRIS and a fast automatic PDK modeling tool iModeler. This certification can significantly increase the design delivery speed of IC design companies on the 8LPP process.
The 8LPP process of Samsung's foundry has further optimized power, performance and area on the basis of the advanced node of the previous generation of FinFET. For mobile, network, server, automotive and cryptocurrency applications, 8LPP provides obvious advantages and is considered one of the most attractive process nodes in many high-performance applications.
"As the design complexity of advanced process nodes continues to increase, accurate EM simulation has become critical for our customers to achieve the success of one-off chip design tapeout." said Jongwook Kye, vice president of Samsung Electronics Design Enablement team.
The successful certification of the 3D full-wave EM suite with semiconductor will create enough confidence for our mutual customers when creating models and running EM simulations.
Dr. Ling Feng, CEO of Sihe Semiconductor, said: "We are very pleased that IRIS can achieve a high degree of agreement between simulation and test data, and thus obtained Samsung 8LPP process certification. As a Samsung Advanced Foundry Ecosystem (SAFE)
The members of the project, Xinhe Semiconductor will continue to cooperate with Samsung in various process technologies to provide our mutual customers with innovative solutions and services.
IRIS adopts the most advanced EM simulation technology tailored for advanced process nodes. It provides accurate full-wave algorithms from DC to THz, and achieves simulation efficiency acceleration through multi-core parallel computing and distributed processing.
IRIS has a number of specific functions that match advanced process nodes, including the ability to consider the deviation of line width and line spacing during processing, so it is widely used by many design companies.
Modeler can automatically generate PDK through built-in rich templates and fast IRIS simulation engine. It can help PDK engineers and circuit design engineers to quickly generate parametric models
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